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Intel Xeon Phi Coprocessor High Performance Programming, 1st Edition

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Author: 
James Reinders
Author: 
Jim Jeffers
Programming

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products.

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Comment: 

"This book belongs on the bookshelf of every HPC professional. Not only does it successfully and accessibly teach us how to use and obtain high performance on the Intel MIC architecture, it is about much more than that. It takes us back to the universal fundamentals of high-performance computing including how to think and reason about the performance of algorithms mapped to modern architectures, and it puts into your hands powerful tools that will be useful for years to come."

Author: 
Robert J. Harrison, Institute for Advanced Computational Science, Stony Brook University
Comment: 

“This book provides the definitive reference on the Xeon Phi architecture, from the “insiders” with more experience on the platform than anyone else alive. Nothing is going to be more important to the future of computing performance over the next few years than the emerging dominance of many-core platforms. With this book, the authors make the architecture and programming models for Intel’s many-core approach accessible to everyone.”

 

 

Author: 
Dan Stanzione, Deputy Director, Texas Advanced Computing Center, The University of Texas at Austin
Comment: 

“The authors’ consummate knowledge of the architecture shines through in this excellent introduction to the fundamentals of programming for the Intel® Xeon Phi™ coprocessor.” I highly recommend this engaging treatise to programmers interested in effectively utilizing the Intel® Xeon Phi™ coprocessor.”

Author: 
R. Glenn Brook, Ph.D., Chief Technology Officer, Joint Institute for Computational Sciences, Director, Application Acceleration Center of Excellence, University of Tennessee / Oak Ridge National Laboratory

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